P‐39: A Flexible 16kb SRAM based on Low‐Temperature Poly‐Silicon (LTPS) TFT Technology | Zendy

Ebihara Hiroaki | Zendy; Karaki Nobuo | Zendy; Hirabayashi Saichi | Zendy; Inoue Satoshi | Zendy; Kodaira Taimei | Zendy; Shimoda Tatsuya | Zendy

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P‐39: A Flexible 16kb SRAM based on Low‐Temperature Poly‐Silicon (LTPS) TFT Technology

Author(s) -

Ebihara Hiroaki,

Karaki Nobuo,

Hirabayashi Saichi,

Inoue Satoshi,

Kodaira Taimei,

Shimoda Tatsuya

Publication year - 2006

Publication title -

sid symposium digest of technical papers

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.351

H-Index - 44

eISSN - 2168-0159

pISSN - 0097-966X

DOI - 10.1889/1.2433496

Subject(s) - thin film transistor , materials science , static random access memory , optoelectronics , silicon , transistor , annealing (glass) , electrical engineering , nanotechnology , engineering , composite material , layer (electronics) , voltage

A flexible 16kb SRAM based on low‐temperature poly‐silicon LTPS) TFT technology and surface‐free technology by laser annealing/ablation (SUFTLA®) is presented. The chip consists of approximately 110,000 transistors and occupies an area of about 90mm 2 (10.8mm × 8.3mm). The read access time is 650ns at 3.0V and 200ns at 6.0V.

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