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P‐20: A Short Channel Effect in Low Temperature Poly‐Si Thin Film Transistor for Active Matrix Display
Author(s) -
Park J. H.,
Nam W. J.,
Lee J. H.,
Han M. K.,
Lee K. Y.,
Choi B. D.,
Yoo K. J.,
Park H. H.
Publication year - 2006
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.2433469
Subject(s) - thin film transistor , materials science , optoelectronics , threshold voltage , transistor , field effect , annealing (glass) , doping , electrical engineering , voltage , layer (electronics) , composite material , engineering
We have investigated a short channel (L μm) effect on an electrical reliability in low temperature poly‐Si (LTPS) thin film transistor (TFT) employing excimer laser annealing (ELA). The decrease of threshold voltage due to the drain induced barrier lowering (DIBL) is observed in p‐type poly‐Si TFT without lightly doped drain (LDD). In the n‐type poly‐Si TFT with LDD, the threshold voltage is slightly decreased when a large drain bias is applied. The field effect mobility is observed on various channel length and LDD. The series resistance due to the LDD in the short channel LTPS is decreased the field effect mobility. The operating temperature dependence of the electrical characteristics is investigated. As the temperature is increase, the poly‐Si TFT's characteristics is improved due to the increase the thermally activated carriers. We have investigated a reliability of short channel poly‐Si TFT. The degradation of short channel poly‐Si TFT under the hot carrier stress is dominant to interface state.