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P‐4: Microcrystalline Silicon TFTs for Active Matrix Displays
Author(s) -
Bui Van Diep,
Bonnassieux Yvan,
Parey Jean Yves,
Djeridane Yassine,
Abramov Alexey,
Roca i Cabarrocas Pere,
Kim Hyun Jae
Publication year - 2006
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.2433454
Subject(s) - amoled , active matrix , thin film transistor , materials science , optoelectronics , oled , passivation , electronic engineering , nanotechnology , layer (electronics) , engineering
Microcrystalline silicone (μ‐Si:H) TFTs were fabricated using a conventional bottom gate amorphous Si (a‐Si:H) process. A unique μc‐Si:H deposition technique and TFT architecture was proposed to enhance the reliability of the TFTs. This three‐mask TFT fabrication process is comparable with existing a‐Si:H TFT process. In order to suppress nucleation at the bottom interface, a N 2 plasma passivation was conducted before the deposition of the μc‐Si:H. A typical transfer characteristic of the TFTs shows a low off‐current with a value of less than 1 pA and a sub‐threshold slope of 0.7 V/dec. DC bias stress was applied to verify the use of μc‐Si:H TFTs for AMOLED displays. After 10,000 s of stress application time, the off‐current was even lowered and sub‐threshold slope variation was less than 5%. For AMOLED displays, OLED pixel simulation was performed. A pixel current of 13 μA was achieved with a V data of 10 V. After the simulation, a linear equation for the pixel current was derived. We also present the simulation tests of simple logical electronics. At last, for Active matrix Display back‐plane, a row driver with no shift compensation is simulated with good results in terms of reproducibility and reliability.