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Peripheral circuit designs using low‐temperature p‐type poly‐Si thin‐film transistors
Author(s) -
Nam WooJin,
Lee JaeHoon,
Lee HyeJin,
Shin HeeSun,
Han MinKoo
Publication year - 2006
Publication title -
journal of the society for information display
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.578
H-Index - 52
eISSN - 1938-3657
pISSN - 1071-0922
DOI - 10.1889/1.2196517
Subject(s) - thin film transistor , offset (computer science) , transistor , polycrystalline silicon , materials science , electronic circuit , buffer (optical fiber) , active matrix , input offset voltage , voltage , computer science , optoelectronics , electrical engineering , operational amplifier , engineering , cmos , nanotechnology , telecommunications , layer (electronics) , amplifier , programming language
Abstract— P‐type low‐temperature (450°C) polycrystalline‐silicon thin‐film‐transistor circuits for peripheral driver integration in active‐matrix displays are proposed and verified. A low‐voltage (5 V) driven poly‐Si scan driver is designed by employing a level shifter and shift register. A source driver for six‐bit digital interface is proposed, and the building blocks such as latch, DAC, and analog buffer are described. The latch samples and holds the digital bits (D and D') without an output voltage loss. A new source‐follower type analog buffer is developed and exhibits a small offset deviation regardless of the V TH variation of the buffer TFT. The simulation and measurement results ensure that the proposed circuits were successfully designed for p ‐type panel integration.