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63.4: Invited Paper: Issues and Challenges Associated with Electrical Testing of Large LCD‐TV Arrays
Author(s) -
Hunter J. Craig,
Brunner Matthias,
Schmid Ralf,
Abboud Frank
Publication year - 2005
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.2036368
Subject(s) - liquid crystal display , test (biology) , engineering , throughput , face (sociological concept) , manufacturing engineering , electrical engineering , computer science , computer hardware , electronic engineering , telecommunications , wireless , operating system , paleontology , social science , sociology , biology
Manufacturing yields at Generation 6/7/8 TFT‐LCD fabs will be a key determinant of LCD TV production costs. Electrical testing of the completed transistor array (“array test”) is a critical element of every manufacturer's yield management strategy. Array test equipment vendors face a number of daunting and seemingly contradictory demands from panel makers — faster throughput and better detection despite larger glass and more complicated pixel structures. Meeting these demands requires innovation in test technology and methodology as well as in mechanical design and operation. This paper describes a few of the technical developments and platform improvements pursued by AKT's electron‐beam array test group (EBT) as it seeks to meet the challenge of testing large LCD TVs.