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Batch processing of high‐performance a‐Si/SiN TFTs using a low‐temperature hot‐wall CVD method
Author(s) -
Ahn Byungchul,
Kanoh Hiroshi,
Sugiura Osamu,
Matsumura Masakiyo
Publication year - 1993
Publication title -
journal of the society for information display
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.578
H-Index - 52
eISSN - 1938-3657
pISSN - 1071-0922
DOI - 10.1889/1.1984857
Subject(s) - materials science , chemical vapor deposition , thin film transistor , subthreshold conduction , optoelectronics , process (computing) , threshold voltage , deposition (geology) , subthreshold slope , reproducibility , voltage , nanotechnology , transistor , computer science , layer (electronics) , electrical engineering , chemistry , chromatography , paleontology , engineering , sediment , biology , operating system
— A chemical‐vapor‐deposition (CVD) method has been applied, for the first time, to a batch process for a‐Si/SiN TFTs. The maximum process temperature was 500°C. High‐performance TFTs with mobilities of 1.2 cm 2 /V‐s, a threshold voltage of 4 V, and a subthreshold slope of 0.6 V/decade have been fabricated with good reproducibility and uniformity over a wide range of CVD conditions. This feature makes the a‐Si/SiN TFT batch process practical.