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Implementation aspects of a low‐power AMLCD single chip
Author(s) -
Hintermann Markus,
Rzittka Eckart,
Radovic Marko
Publication year - 2004
Publication title -
journal of the society for information display
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.578
H-Index - 52
eISSN - 1938-3657
pISSN - 1071-0922
DOI - 10.1889/1.1847745
Subject(s) - computer science , arbiter , key (lock) , mobile device , power (physics) , chip , embedded system , scheme (mathematics) , set (abstract data type) , architecture , focus (optics) , computer hardware , telecommunications , operating system , art , mathematical analysis , physics , mathematics , quantum mechanics , optics , visual arts , programming language
— Mobile phones are always in the operating mode; therefore, a continuous key focus during chip‐set design is low power. To achieve a low‐power display module, the drive scheme and the appropriate IC architecture must be carefully selected to accommodate the different modes of operation found in a typical handheld device. A chosen drive scheme and detailed description of the architecture partitioning, key element design such as a DC/DC converter, D/A selection, and RAM arbiter demonstrates how careful design choices lead to power‐optimized system solution.