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Threshold Voltage Control of Short Channel Poly‐Si TFT by Fluorine and Hydrogen Plasma Treatment
Author(s) -
Yoo J. S.,
Park C. M.,
Choi H. B.,
Bae B. S.,
Kim H. J.,
Han M. K.
Publication year - 1998
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.1833789
Subject(s) - nmos logic , threshold voltage , thin film transistor , pmos logic , materials science , overdrive voltage , reverse short channel effect , negative bias temperature instability , passivation , fluorine , hydrogen , plasma , optoelectronics , voltage , drain induced barrier lowering , transistor , electrical engineering , chemistry , nanotechnology , layer (electronics) , physics , organic chemistry , quantum mechanics , metallurgy , engineering
The short channel nMOS and pMOS poly‐Si TFTs exhibit positive shift of threshold voltage when exposed to fluorine plasma due to negative charges collected at the gate insulator. The threshold voltage of short channel devices shifts to negative gate bias as the hydrogenation period increases due to passivation of defect states at the channel depletion region. This paper reports a method for controlling the threshold voltage of short channel poly‐Si TFTs by fluorine and hydrogen plasma treatment. The threshold voltage shift due to gate bias stress is not so severe that the proposed method does not affect the long‐term device stability.