25.3: A Novel Self‐Aligned Coplanar Amorphous Silicon Thin Film Transistor

A novel self‐aligned coplanar a‐Si:H TFT was developed using the three stacked layers of thin a‐Si: H, silicon‐nitride (SiN x ), and a‐Si:H. After patterning thin a‐Si:H and SiN x , the structure was ion‐doped and then Ni layer was deposited. The fabricated TFT exhibited a field effect mobility of 0.44 cm 2 /Vs, a threshold voltage of 5.3 V, a subthreshold slope of 0.5 V/dec., an on/off current ratio of about 10 7 , and parasitic resistance of 5.3 × 10 3 Ω Coplanar self‐aligned a‐Si:H TFT is very suitable for the fabrication of large area and high resolution TFT‐LCD because of small parasitic resistance and very small parasitic capacitance between gate and source/drain electrodes.