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25.2: Simple Process of Hillock‐Free Al‐Gate Metallization without ITO/Al Contact Problems for Large‐Area TFT‐LCDs
Author(s) -
Seo H. S.,
Choi J. B.,
Yun D. C.,
Kim C. D.,
Soh H. S.
Publication year - 1998
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.1833770
Subject(s) - materials science , thin film transistor , hillock , optoelectronics , annealing (glass) , oxide thin film transistor , plasma enhanced chemical vapor deposition , layer (electronics) , chemical vapor deposition , nanotechnology , metallurgy , composite material
As low resistive gate lines in thin film transistors (TFTs), the various structures of aluminum(Al) double layers patterned by one photolithography process have been investigated. Only for the Mo/Al structure, Al hillocks were not shown during or/and after plasma enhanced chemical vapor deposition (PECVD) process of 320°C. It would be considered that the stress of Al film would be compensated by the compressive molybdenum(Mo) film. Addition‐ally, this Mo layer would prevent the surface of Al layer from oxidization during Iridium‐Tin Oxide (ITO) pixel deposition and annealing at the pad open region. As a result, there is no contact problem in the ITO/Mo/Al structure. The 12.1 inch SVGA TFT‐LCD was successfully fabricated by simple process with this Mo/Al structure as a gate line.