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19.4: Low Temperature PECVD a‐Si:H TFT for Plastic Substrates
Author(s) -
He Shusheng,
Nishiki Hirohiko,
Hartzell John,
Nakata Yukihiko
Publication year - 2000
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.1832937
Subject(s) - plasma enhanced chemical vapor deposition , materials science , dilution , thin film transistor , threshold voltage , optoelectronics , nitride , channel (broadcasting) , silicon nitride , electrical engineering , voltage , transistor , composite material , silicon , layer (electronics) , engineering , physics , thermodynamics
Using a suitable dilution process at PECVD improves quality of gate nitride and a‐Si:H channel at low temperature. By using suitable Ar dilution in gate nitride and H 2 dilution in a‐Si:H channel, the low temperature a‐Si:H TFTs have not only similar channel mobility and threshold voltage, but also similar stress induced threshold voltage shift as usual a‐Si:H TFTs.
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