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51.3: Successful Electrostatic Discharge Protection Design for LTPS Circuits Integrated on Panel
Author(s) -
Ker MingDou,
Tseng TangKui,
Shih An,
Yang ShengChieh,
Tsai YawMing
Publication year - 2003
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.1832547
Subject(s) - electrostatic discharge , electronic circuit , clamp , robustness (evolution) , electrical engineering , flat panel display , clamper , engineering , voltage , electronic engineering , mechanical engineering , clamping , biochemistry , chemistry , gene
A successful electrostatic discharge (ESD) protection design for 2.2‐inch TFT‐OLED product has been proposed and demonstrated in this paper. The panel‐B with this successful ESD protection design has shown higher ESD robustness, as comparing to the panel‐A with old‐version ESD protection method. The VDD‐to‐VSS ESD clamp circuits have been inserted in I/O region of panel‐B to effectively protect the internal circuits. Moreover, the turn‐on behavior in time domain of VDD‐to‐VSS ESD clamp circuits has been verified to clamp the overstress ESD pulse. The I‐V curve shifting and failure analysis with hot‐spot pictures after ESD zapping are also shown in this paper.