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P‐5: Electrical Properties of Pentacene TFTs with Stacked and Surface‐Treated Organic Gate Dielectrics
Author(s) -
Kang ChangHeon,
Lee JongHyuk,
Kim YeonJu,
Choi Jong Sun
Publication year - 2003
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.1832242
Subject(s) - pentacene , materials science , gate dielectric , polystyrene , thin film transistor , dielectric , optoelectronics , insulator (electricity) , transistor , layer (electronics) , composite material , electrical engineering , voltage , polymer , engineering
Abstract In this work, the electrical characteristics of organic thin film transistors with stacked and surface‐treated organic gate dielectrics have been studied. PVP Polyvinylphenol, polystyrene, stacked PVP‐polystyrene and polystyrene‐PVP were used as gate insulator layers, respectively. The electrical characteristics of the devices with four gate insulator structures were measured and compared with each other for the best structure of gate dielectric layer. Also, for the better device performance, the photoalignment technique was used. Being applied to gate dielectric layers of organic TFTs, it might provide preferential orientation and grain size of pentacene molecules, which would be deposited on the gate insulator PVP surface previously exposed to the linearly polarized UV light LPUVL to enhance the TFT characteristics [1, 2].