z-logo
Premium
P‐4: Fabrication of Extremely Low Roughness Polycrystalline Silicon and Its Correlation to Device Performance
Author(s) -
Chen YuCheng,
Liu YuRung,
Lin JiaXing,
Chen ChiLin,
Chang JungFang,
Wu YungFu,
Yeh YungHui,
Sheu ChaiYuan,
Chang ShangWen
Publication year - 2003
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.1832241
Subject(s) - polycrystalline silicon , materials science , chemical mechanical planarization , surface roughness , fabrication , optoelectronics , annealing (glass) , surface finish , silicon , crystallite , smoothing , etching (microfabrication) , polishing , composite material , thin film transistor , computer science , metallurgy , medicine , alternative medicine , layer (electronics) , pathology , computer vision
The process of smoothing polycrystalline silicon surface has been investigated. By etching the precursor and controlling the laser annealing, The roughness of poly‐Si can be planarized to a very low level RMS<2nm. In addition, TFTs based on poly‐Si planarization process have been fabricated. We found the proposed device performs much better than the conventional one.

This content is not available in your region!

Continue researching here.

Having issues? You can contact us here