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17.1: Invited Paper : Direction of Low‐Temperature p‐Si Technology
Author(s) -
Kanzaki Koichi,
Sakamoto Masanori
Publication year - 2001
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.1831841
Subject(s) - power consumption , thin film transistor , liquid crystal display , key (lock) , pixel , electrical engineering , computer science , power (physics) , electronic engineering , engineering , materials science , optoelectronics , artificial intelligence , nanotechnology , physics , computer security , layer (electronics) , quantum mechanics
Low temperature p‐Si technology road map is proposed and discussed focusing on the evollution of TFT performance and integration density. Integration of DAC and control circuits will realize lighter‐weight and lower cost display, where, higher resolution and larger display size require higher TFT performance. While, higher integration density enables multi‐bits(∼ 8bits) memories in pixels and significantly reduces the driving power consumption. Another key is the combination of OLED, which will replace LCD and become the main stream flat panel technology.