Premium
P‐2: A Novel Structure of AMLCD Panel Using Poly‐Si CMOS TFT
Author(s) -
Yang J. Y.,
Kim SangHyun,
Park YongIn,
Lim KyoungMoon,
Kim ChangDong
Publication year - 2004
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.1830955
Subject(s) - cmos , thin film transistor , fabrication , process (computing) , electronic engineering , materials science , electrical engineering , computer science , engineering , nanotechnology , medicine , alternative medicine , layer (electronics) , pathology , operating system
In the fabrication of CMOS AMLCD panel, there has been much effort to reduce the number of mask steps in order to achieve the simpler process as well as the low‐cost production. In this paper, we report a 3.5‐inch QVGA CMOS AMLCD panel with 6‐bit driver and DAC through the 7‐mask process that requires fewer mask steps than conventional 9‐mask process.