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P‐6: A Design Robust Against Hot‐carrier Stress for Low‐temperature Poly‐Si TFT LCDs Fabricated using a 450°C Process
Author(s) -
Shiba Takeo,
Itoga Toshihiko,
Toyota Yoshiaki,
Ohkura Makoto,
Miyazawa Toshio,
Sakai Takeshi
Publication year - 2002
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.1830235
Subject(s) - thin film transistor , materials science , optoelectronics , stress (linguistics) , substrate (aquarium) , degradation (telecommunications) , transistor , electronic engineering , composite material , electrical engineering , engineering , voltage , linguistics , philosophy , oceanography , layer (electronics) , geology
Degradation phenomena of low‐temperature poly‐Si thin film transistors (TFTs) under direct current (DC) and dynamic stress were thoroughly investigated, and a robust design was developed for TFT LCDs fabricated on a 730×920‐mm glass substrate using a 450°C process. A system‐in display capability having a stress immunity was also demonstrated.