Premium
34.1: Advanced Four‐Mask Process Architecture for the a‐Si TFT Array Manufacturing Method
Author(s) -
Song Jean H.,
Kwon D. J.,
Kim S. G.,
Roh N. S.,
Park H. S.,
Park Y. B.,
Kim D. G.,
Jeong C. O.,
Kong H. S.,
Kim C. W.,
Chung K. H.
Publication year - 2002
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.1830120
Subject(s) - photolithography , etching (microfabrication) , dry etching , process (computing) , process window , materials science , thin film transistor , clearance , optoelectronics , process engineering , computer science , lithography , engineering , nanotechnology , layer (electronics) , operating system , medicine , urology
In order to simplify a‐Si TFT array manufacturing process, advanced 4 mask process of low resistant metal and new pixel electrode with improved unit process was developed. Slit photolithography with continuous dry etching process on the basis of metal dry etching cleared chronic problems of currently adopted 4 mask process and new combination of material and etchant for wet etching process made it possible to achieve stabilized wet etching and reduce total process steps. Our final version of a‐Si TFT process architecture applicable to both notebook and monitor devices, will reinforce competitive power of TFT‐LCD by improved displaying performance and ultimate process simplification.