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54.4: A High Accurate Analog Buffer Circuit using Low Temperature Poly‐Si TFT
Author(s) -
Yoo YongSu,
Choi JinYoung,
Shim HyunSook,
Kwon OhKyong
Publication year - 2004
Publication title -
sid symposium digest of technical papers
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.351
H-Index - 44
eISSN - 2168-0159
pISSN - 0097-966X
DOI - 10.1889/1.1825776
Subject(s) - buffer (optical fiber) , settling time , thin film transistor , voltage , settling , materials science , buffer amplifier , threshold voltage , overdrive voltage , optoelectronics , electrical engineering , transistor , physics , engineering , step response , nanotechnology , layer (electronics) , control engineering , thermodynamics
A high accurate Low Temperature Polycrystalline Silicon(LTPS) analog buffer circuit has been developed. It has shorter settling time of output voltage and higher immunity to threshold voltage variation than conventional source follower type buffers. Measured results show that the proposed buffer takes the settling time of 23 μsec to drive the load of 32pF and 2kΩ When the threshold voltages of TFTs that constitute the proposed buffer vary as ±1V, which is the 5 times that of the standard deviation of measured threshold voltage, HSPICE simulation results show that the maximum output mis‐charging voltage is 23mV.