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Low Latency Mesh-based Hierarchical Network-on-Chip Structure
Author(s) -
Gang Jian,
Guodong Han,
Yuhan Zhou
Publication year - 2015
Publication title -
2015 the 5th international workshop on computer science and engineering-information processing and control engineering
Language(s) - Uncategorized
Resource type - Conference proceedings
DOI - 10.18178/wcse.2015.04.115
Subject(s) - computer science , latency (audio) , network on a chip , chip , parallel computing , computer network , embedded system , telecommunications

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