Open AccessParallel Block-Based Architecture for Improved Edge Detection in Verilog
Author(s) -
S. Neethu Raj,
Valdivielso Chian Alex
Publication year - 2015
Publication title -
international journal of engineering research and technology
Language(s) - English
Resource type - Journals
ISSN - 2278-0181
DOI - 10.17577/ijertv4is070778
Subject(s) - verilog , block (permutation group theory) , computer science , architecture , enhanced data rates for gsm evolution , computer architecture , parallel computing , embedded system , field programmable gate array , artificial intelligence , mathematics , art , geometry , visual arts