Open AccessAn Efficient Approach to an 8-Bit Digital Multiplier Architecture based on Ancient Indian Mathematics
Author(s) -
Shardul P. Telharkar,
Shantanu P. Telharkar,
Raj D. Pednekar
Publication year - 2015
Publication title -
international journal of engineering research and technology
Language(s) - English
Resource type - Journals
ISSN - 2278-0181
DOI - 10.17577/ijertv4is060918
Subject(s) - multiplier (economics) , architecture , computer science , arithmetic , computer architecture , bit (key) , mathematics , geography , computer network , archaeology , economics , macroeconomics