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Energy Efficient CRC Design for Processor of Workstation, and Server using LVCMOS
Author(s) -
Abhay Saxena,
Chandrashekhar Patel,
M. Sadiq Ali Khan
Publication year - 2017
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2017/v10i4/110890
Subject(s) - field programmable gate array , reduction (mathematics) , computer science , power (physics) , clock rate , efficient energy use , electrical engineering , embedded system , telecommunications , physics , mathematics , chip , geometry , quantum mechanics , engineering

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