Open AccessUART Receiver Synchronization: Investigating the Maximum Tolerable Clock Frequency Deviation
Author(s) -
Mitu Raj
Publication year - 2017
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2017/v10i25/115278
Subject(s) - baud , universal asynchronous receiver/transmitter , computer science , oversampling , jitter , transmitter , clock synchronization , synchronization (alternating current) , standard deviation , frequency deviation , electronic engineering , mathematics , telecommunications , statistics , transmission (telecommunications) , bandwidth (computing) , channel (broadcasting) , automatic frequency control , engineering , chip