
Design of an Efficient Low Power Multiplier: Combining Reversible and an Ancient Vedic Method Approach
Author(s) -
Mohinder Bassi,
Shekhar Verma,
Rupendeep Kaur
Publication year - 2016
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2016/v9i7/84474
Subject(s) - multiplier (economics) , cmos , computer science , very large scale integration , power consumption , arithmetic , gate count , computer hardware , electronic engineering , power (physics) , embedded system , mathematics , physics , engineering , quantum mechanics , economics , macroeconomics