
Design and Analysis of Clock Gating Elements
Author(s) -
S. Ravi,
Subhajit Sinha,
R. Adithyan,
Harish M. Kittur
Publication year - 2016
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2016/v9i5/87184
Subject(s) - clock gating , clock skew , computer science , cadence , gating , digital clock manager , timing failure , clock domain crossing , skew , benchmark (surveying) , static timing analysis , chip , matching (statistics) , synchronous circuit , electronic engineering , clock signal , embedded system , mathematics , engineering , telecommunications , physiology , statistics , geodesy , geography , jitter , biology