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Simulation of 32-Point Split-Radix Multipath Delay Commutator (SRMDC) based FFT Architecture
Author(s) -
V. Mangaiyarkarasi,
C.-P Paul
Publication year - 2016
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2016/v9i31/94595
Subject(s) - fast fourier transform , split radix fft algorithm , prime factor fft algorithm , computer science , orthogonal frequency division multiplexing , algorithm , rader's fft algorithm , twiddle factor , multipath propagation , very large scale integration , parallel computing , mathematics , embedded system , fourier transform , telecommunications , fractional fourier transform , short time fourier transform , fourier analysis , mathematical analysis , channel (broadcasting)

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