
A Power-Efficient Multiplexer using Reversible Logic
Author(s) -
Neha Pannu,
Neelam Rup Prakash
Publication year - 2016
Publication title -
indian journal of science and technology
Language(s) - Uncategorized
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2016/v9i30/94689
Subject(s) - multiplexer , computer science , power–delay product , cmos , threshold voltage , voltage , electrical engineering , electronic circuit , logic gate , figure of merit , transistor , electronic engineering , algorithm , engineering , telecommunications , multiplexing , computer vision