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Design and Development of BIST Architecture for Characterization of S-RAM Stability
Author(s) -
M. Krishna Chaitanya,
V. Ravi
Publication year - 2016
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2016/v9i21/89610
Subject(s) - static random access memory , built in self test , computer science , voltage , embedded system , computer hardware , electronic engineering , engineering , electrical engineering

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