Open AccessDesign and Implementation of Reconfigurable ALU for Signal Processing Applications
Author(s) -
J. Thameema Begum,
Somaiya Naidu,
N. Vaishnavi,
G. Sakana,
N. Prabhakaran
Publication year - 2016
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2016/v9i2/86343
Subject(s) - computer science , verilog , floating point , adder , subtractor , field programmable gate array , integer (computer science) , arithmetic logic unit , arithmetic , computer hardware , hardware description language , ieee floating point , parallel computing , algorithm , mathematics , programming language , telecommunications , latency (audio)