Open AccessStudy and Analysis of CMOS Carry Look Ahead Adder with Leakage Power Reduction Approaches
Author(s) -
Damarla Paradhasaradhi,
K. Satya Priya,
K. Sabarish,
P. Harish,
G. V. Narasimharao
Publication year - 2016
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2016/v9i17/93111
Subject(s) - adder , computer science , cmos , carry (investment) , leakage (economics) , pmos logic , electronic engineering , dissipation , nmos logic , leakage power , power analysis , transistor , dynamic demand , very large scale integration , power (physics) , electrical engineering , voltage , embedded system , engineering , algorithm , finance , cryptography , economics , macroeconomics , physics , quantum mechanics , thermodynamics