Open AccessConceptual Improvisation on Low Power Mitigation for Domino Logic Systems using CHSK Domino Logic
Author(s) -
Muralidharan Jayabalan,
P. Manimegalai
Publication year - 2016
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2016/v9i16/87676
Subject(s) - domino logic , computer science , domino , power–delay product , logic family , logic optimization , multiplexer , electronic engineering , dynamic logic (digital electronics) , logic synthesis , pass transistor logic , logic gate , asynchronous circuit , cmos , electrical engineering , electronic circuit , digital electronics , multiplexing , engineering , algorithm , telecommunications , synchronous circuit , transistor , adder , clock signal , voltage , chemistry , biochemistry , catalysis , jitter