
3D VLSI Non-Slicing Floor Planning using Modified Corner List Representation
Author(s) -
P. Sivaranjani,
Ashavani Kumar
Publication year - 2015
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2015/v8i35/81204
Subject(s) - floorplan , very large scale integration , computer science , slicing , benchmark (surveying) , algorithm , physical design , representation (politics) , integrated circuit layout , heuristic , integrated circuit , routing (electronic design automation) , computer engineering , parallel computing , circuit design , embedded system , artificial intelligence , geodesy , politics , world wide web , political science , law , geography , operating system