Open AccessDesign of Power Aware on Chip Embedded Memory based FSM Encoding in FPGA
Author(s) -
M. Jasmin,
T. Vigneshwaran,
S. Hemalatha
Publication year - 2015
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2015/v8i32/89043
Subject(s) - computer science , finite state machine , static random access memory , fifo (computing and electronics) , clock gating , field programmable gate array , embedded system , encoding (memory) , logic block , computer hardware , parallel computing , clock signal , synchronous circuit , algorithm , telecommunications , jitter , artificial intelligence