Open AccessDesigning of a Digital to Analog Convertor Fully in CMOS, 0.18µm, 1.8V Technology with SFDR more than 70dB
Author(s) -
Peyman Karami
Publication year - 2015
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2015/v8i30/84401
Subject(s) - spurious free dynamic range , analog to digital converter , digital to analog converter , analog signal , computer science , electronic engineering , cmos , converters , successive approximation adc , digital down converter , unary operation , analog device , analog multiplier , electrical engineering , mixed signal integrated circuit , computer hardware , digital signal processing , electronic circuit , capacitor , engineering , mathematics , voltage , combinatorics