Open AccessLow Leakage Power Vedic Multiplier using Standard Cell Design
Author(s) -
R. Sakthivel,
M. Vanitha,
Sneha Singh
Publication year - 2015
Publication title -
indian journal of science and technology
Language(s) - Uncategorized
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2015/v8i24/85349
Subject(s) - biasing , multiplier (economics) , leakage (economics) , leakage power , standard cell , power analysis , electronic circuit , computer science , electronic engineering , integrated circuit , voltage , materials science , electrical engineering , optoelectronics , algorithm , transistor , engineering , cryptography , economics , macroeconomics