
Design of Signal Delay-Detection System by using Dual-Edge Trigger Flip Flops
Author(s) -
Madhu Lodhi,
T. Vigneswaran
Publication year - 2015
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2015/v8i20/79115
Subject(s) - signal edge , computer science , signal (programming language) , enhanced data rates for gsm evolution , clock signal , synchronizing , noise (video) , digital clock manager , clock domain crossing , sampling (signal processing) , flip flop , clock skew , real time computing , jitter , electronic engineering , synchronous circuit , computer hardware , telecommunications , transmission (telecommunications) , analog signal , digital signal processing , engineering , artificial intelligence , detector , image (mathematics) , programming language