Open Access28nm FPGA based Power Optimized UART Design using HSTL I/O Standards
Author(s) -
Isha Gupta,
. Garima,
Swati Singh,
Harpreet Kaur,
Deepshikha Bhatt,
Aamir Vohra
Publication year - 2015
Publication title -
indian journal of science and technology
Language(s) - Uncategorized
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2015/v8i17/76859
Subject(s) - universal asynchronous receiver/transmitter , field programmable gate array , computer science , vhdl , embedded system , power (physics) , computer hardware , telecommunications , chip , physics , quantum mechanics