Open AccessFPGA based design of Reed Solomon codes
Author(s) -
Shivani Pasricha
Publication year - 2009
Publication title -
indian journal of science and technology
Language(s) - Uncategorized
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2009/v2i4.11
Subject(s) - modelsim , field programmable gate array , computer science , virtex , codec , embedded system , reed–solomon error correction , coding (social sciences) , computer hardware , digital signal processing , matlab , computer architecture , vhdl , decoding methods , algorithm , block code , concatenated error correction code , operating system , statistics , mathematics