
VHDL modeling and simulation of data scrambler and descrambler for secure data communication
Author(s) -
G. Mohiuddin Bhat
Publication year - 2009
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2009/v2i10.14
Subject(s) - vhdl , computer science , field programmable gate array , key (lock) , encoder , embedded system , power consumption , power (physics) , computer hardware , operating system , physics , quantum mechanics