Open AccessDesign of Efficient adder Circuits in Sub Threshold Region
Author(s) -
J. Angela Shajini,
J. Thilagavathy
Publication year - 2017
Publication title -
ijireeice
Language(s) - English
Resource type - Journals
eISSN - 2321-5526
pISSN - 2321-2004
DOI - 10.17148/ijireeice.2017.5518
Subject(s) - adder , electronic circuit , computer science , electronic engineering , electrical engineering , engineering , telecommunications , latency (audio)
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