Open AccessReview of High Speed 32-bit Single Precision Floating Point Complex Multiplier using Vedic Mathematics
Author(s) -
Miss. Ashwini B. Kewate,
Prof. P.R. Indurkar,
Prof. A.W. Hinganikar
Publication year - 2016
Publication title -
international journal of innovative research in electrical, electronics, instrumentation and control engineering
Language(s) - English
Resource type - Journals
eISSN - 2321-5526
pISSN - 2321-2004
DOI - 10.17148/ijireeice.2016.4207
Subject(s) - multiplier (economics) , arithmetic , bit (key) , single precision floating point format , computer science , floating point , mathematics , algorithm , computer security , economics , macroeconomics