Open AccessEfficient Power Conservation using adiabatic subtracter
Author(s) -
Mrs. S.S. Katre,
Mrs S.S. Chiwande,
Mrs.M.L. Keote,
Mrs S.M. Wakode
Publication year - 2015
Publication title -
ijireeice
Language(s) - Uncategorized
Resource type - Journals
eISSN - 2321-5526
pISSN - 2321-2004
DOI - 10.17148/ijireeice.2015.3329
Subject(s) - adiabatic circuit , adiabatic process , pull up resistor , emitter coupled logic , subtractor , pass transistor logic , logic gate , dissipation , logic family , computer science , logic level , electronic engineering , logic synthesis , cmos , power (physics) , electrical engineering , digital electronics , physics , engineering , electronic circuit , adder , quantum mechanics
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