Verification & Design Techniques Used in a Graduate Level VHDL Course
Author(s) -
Swati Agrawal
Publication year - 2015
Publication title -
ijireeice
Language(s) - English
Resource type - Journals
eISSN - 2321-5526
pISSN - 2321-2004
DOI - 10.17148/ijireeice.2015.3201
Subject(s) - course (navigation) , vhdl , computer science , software engineering , programming language , mathematics education , psychology , engineering , embedded system , field programmable gate array , aerospace engineering
Accelerating Research
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom
Address
John Eccles HouseRobert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom