Open AccessA Novel Architecture for Multiplier and Accumulator unit by using Parallel Prefix Adders
Author(s) -
N. Nagarajan,
T Muruganantham,
S Rajapriya
Publication year - 2019
Publication title -
international journal of advanced research in computer and communication engineering
Language(s) - English
Resource type - Journals
eISSN - 2319-5940
pISSN - 2278-1021
DOI - 10.17148/ijarcce.2019.8612
Subject(s) - accumulator (cryptography) , prefix , arithmetic , adder , parallel computing , computer science , architecture , unit (ring theory) , computer architecture , mathematics , algorithm , telecommunications , latency (audio) , history , linguistics , philosophy , mathematics education , archaeology