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Resolution and Parallelizability: Barriers to the Efficient Parallelization of SAT Solvers
Author(s) -
George Katsirelos,
Ashish Sabharwal,
Horst Samulowitz,
Laurent Simon
Publication year - 2013
Publication title -
proceedings of the aaai conference on artificial intelligence
Language(s) - English
Resource type - Journals
eISSN - 2374-3468
pISSN - 2159-5399
DOI - 10.1609/aaai.v27i1.8660
Subject(s) - mathematical proof , computer science , parallel computing , resolution (logic) , boolean satisfiability problem , satisfiability , exploit , theoretical computer science , mathematics , programming language , computer security , geometry

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