Open AccessCMOL/CMOS Hardware Architectures and Performance/price for Bayesian Memory - The Building Block of Intelligent Systems
Author(s) -
Mazad Zaveri
Publication year - 2008
Language(s) - English
Resource type - Dissertations/theses
DOI - 10.15760/etd.7869
Subject(s) - cmos , transistor , block (permutation group theory) , computer science , resistive random access memory , computer architecture , scaling , semiconductor industry , scalability , moore's law , domain (mathematical analysis) , electronic engineering , electrical engineering , engineering , manufacturing engineering , mathematics , geometry , voltage , database , mathematical analysis
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