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Novel Low Power Logic Gates using Sleepy Techniques
Author(s) -
Vijaylaxmi C Kalal,
Ravikumar K. I,
Chaitrali V. Pawar
Publication year - 2015
Publication title -
international journal of advanced research in electrical, electronics and instrumentation engineering
Language(s) - English
Resource type - Journals
eISSN - 2320-3765
pISSN - 2278-8875
DOI - 10.15662/ijareeie.2015.0401018
Subject(s) - power (physics) , computer science , physics , quantum mechanics

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