Open AccessDESIGN OF POWER AND DELAY EFFICIENT 32 BIT X 32 BIT MULTI-PRECISION MULTIPLIER WITH OPERANDS SCHEDULER
Author(s) -
K T . Jitha
Publication year - 2015
Publication title -
international journal of research in engineering and technology
Language(s) - English
Resource type - Journals
eISSN - 2321-7308
pISSN - 2319-1163
DOI - 10.15623/ijret.2015.0402082
Subject(s) - operand , bit (key) , multiplier (economics) , computer science , 4 bit , power (physics) , arithmetic , 16 bit , electronic engineering , computer hardware , mathematics , engineering , physics , computer network , economics , macroeconomics , cmos , quantum mechanics