Open AccessHIGH PERFORMANCE LOW LEAKAGE POWER FULL SUBTRACTOR CIRCUIT DESIGN USING RATE SENSING KEEPER
Author(s) -
D. Sivaranjani
Publication year - 2014
Publication title -
international journal of research in engineering and technology
Language(s) - English
Resource type - Journals
eISSN - 2321-7308
pISSN - 2319-1163
DOI - 10.15623/ijret.2014.0319115
Subject(s) - subtractor , leakage power , leakage (economics) , electronic engineering , electrical engineering , materials science , computer science , engineering , transistor , adder , cmos , voltage , economics , macroeconomics